[Battlemesh] Gigabit switch/router openwrt with SFP (Netonix)

[Laurent GUERBY]

On Tue, 2016-04-19 at 22:15 +0200, Baptiste Jonglez wrote:
> Hi,
> 
> On Tue, Apr 12, 2016 at 04:10:06PM +0200, Musti wrote:
> > I am writing to you in search of an openwrt device using the switch
> > functionality, ideally I need something like RB260GSP:
> > http://routerboard.com/RB260GSP
> > 
> > Requirements:
> > - runs openwrt
> > - gigabit switch with one SFP port
> > - PoE in and out
> > - gpio/uart somewhat exposed or on some pads
> 
> Have a look at Netonix, they make gigabit switches with PoE in/out, for
> instance this one:
> 
>   https://www.netonix.com/wisp-switch/ws-6-mini.html
> 
> There are others with SFP ports, and you may be able to hack a PoE input,
> for instance on this one:
> 
>   https://www.netonix.com/wisp-switch/ws-12-250-dc.html
> 
> Unfortunately, the hardware does not seem to be supported by OpenWRT.

Hi,

>From Netonix forums:

http://forum.netonix.com/viewtopic.php?f=6&t=1505&p=11151&hilit=openwrt#p11151
"We do not use glibc. Like most openwrt based firmwares we use uclibc."

http://forum.netonix.com/viewtopic.php?f=6&t=487&p=3282&hilit=openwrt#p3282
"We use Open-WRT but the switch core has it's own code provided by the
manufacturer just like UBNT or any switch.

The Open-WRT is just the UI and some modules that offload some protocol
controls like LACP/RSTP and such but the switching itself is always
handled inside core with it's own pre-loaded code."

http://forum.netonix.com/viewtopic.php?t=425&p=2645
"Please press Enter to activate this console. vtss_core: module license
'(c) Vitesse Semiconductor Inc.' taints kernel.
switch: 'Luton26' board detected"

On one of our WS-6-MINI:

root at NX:/www# cat /proc/version 
Linux version 2.6.26.8 (dev at netonixdev) (gcc version 4.1.2) #9 Sat Feb
21 19:48:11 EST 2015
root at NX:/www# cat /proc/cpuinfo 
system type		: Vitesse VCore-III
processor		: 0
cpu model		: MIPS 24K V5.4
BogoMIPS		: 277.70
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 16
extra interrupt vector	: yes
hardware watchpoint	: yes
ASEs implemented	: mips16 dsp
shadow register sets	: 1
core			: 0
VCED exceptions		: not available
VCEI exceptions		: not available

I did not see and did not ask for source code.

Sincerely,

Laurent