[Battlemesh] Atheros chips [was: 802.11ac improvements]
jch at pps.univ-paris-diderot.fr
Fri Feb 26 01:43:50 CET 2016
Thanks, interesting link.
Could somebody who understands this stuff explain the logic behind their
SoC cores? The .11n design use single-core 24K and 74K MIPS chips, while
the single .11ac design uses quad-core Cortex-A7.
Why the switch to ARM, and why the quad-core Cortex-A7 instead of
a single- or dual-core Cortex-A9, which would probably give better
performance with a simpler design?
(I know, I know, I'm an old man and don't get this multi-core goodness.)
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